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STLM75
Digital temperature sensor and thermal watchdog
Features
Measures temperatures from -55C to +125C (-67F to +257F) - 2C accuracy from -25C to +100C (max) Low operating current: 125 A (typ) No external components required 2-wire I2C/SMBus-compatible serial interface - Supports bus time-out feature - Selectable bus address allows connection of up to eight devices on the bus Wide power supply range-operating voltage range: 2.7 V to 5.5 V Conversion time is 150 ms (max) Programmable temperature threshold and hysteresis set points Pin- and software-compatible with LM75 (dropin replacement) Power-up defaults permit standalone operation as a thermostat Shutdown mode to minimize power consumption Output pin (open drain) can be configured for interrupt or comparator/thermostat mode (dual purpose event pin) Packages: - SO8 - MSOP8 (TSSOP8)
MSOP8 (TSSOP8) (DS) SO8 (M)

July 2008
Rev 9
1/37
www.st.com 1
Contents
STLM75
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1 1.2 1.3 Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Temperature sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.1 1.3.2 1.3.3 1.3.4 1.3.5 1.3.6 SDA (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 OS/INT (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 A2, A1, A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Thermal alarm function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Fault tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Temperature data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Bus timeout feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 Registers and register set formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.1 3.1.2 3.1.3 3.1.4 3.1.5 Command/pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Temperature register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Over-limit temperature register (TOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Hysteresis temperature register (THYS) . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.2 3.3 3.4
Power-up default conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4.1 3.4.2 Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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STLM75 3.4.3 3.4.4 3.4.5
Contents Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.5 3.6
READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4 5 6 7 8 9
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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List of tables
STLM75
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Fault tolerance setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Relationship between temperature and digital output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Command/pointer register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Register pointers selection summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Configuration register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Temperature register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 TOS and THYS register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 STLM75 serial bus slave addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 SO8 - 8-lead plastic small outline package mechanical data. . . . . . . . . . . . . . . . . . . . . . . 33 MSOP8 (TSSOP8) - 8-lead, thin shrink small package (3x3) mechanical data . . . . . . . . . 34 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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STLM75
List of figures
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Connections (SO8 and TSSOP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Typical 2-wire interface connections diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 OS output temperature response diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS) . . . . . . . . . . . . 24 Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp). . . . . . 24 Typical 1-byte READ from the configuration register with preset pointer . . . . . . . . . . . . . . 24 Typical pointer set followed by an immediate READ from the configuration register . . . . . 25 Configuration register WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 TOS and THYS WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Temperature variation vs. voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 SO8 - 8-lead plastic small package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 MSOP8 (TSSOP8) - 8-lead, thin shrink small package (3x3) outline. . . . . . . . . . . . . . . . . 34
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Description
STLM75
1
Description
The STLM75 is a high-precision digital CMOS temperature sensor IC with a sigma-delta temperature-to-digital converter and an I2C-compatible serial digital interface (see Figure 1 on page 7). It is targeted for general applications such as personal computers, system thermal management, electronics equipment, and industrial controllers, and is packaged in the industry standard 8-lead TSSOP and SO8 packages. The device contains a band gap temperature sensor and 9-bit ADC which monitor and digitize the temperature to a resolution up to 0.5C. The STLM75 is typically accurate to (3C - max) over the full temperature measurement range of -55C to 125C with 2C accuracy in the -25C to +100C range. The STLM75 is pin-for-pin and software compatible with the LM75B. STLM75 is specified for operating at supply voltages from 2.7 V to 5.5 V. Operating at 3.3 V, the supply current is typically (125 A). The on-board sigma-delta analog-to-digital converter (ADC) converts the measured temperature to a digital value that is calibrated in degrees centigrade; for Fahrenheit applications a lookup table or conversion routine is required. The STLM75 is factory-calibrated and requires no external components to measure temperature.
1.1
Serial communications
The STLM75 has a simple 2-wire I2C-compatible digital serial interface which allows the user to access the data in the temperature register at any time. It communicates via the serial interface with a master controller which operates at speeds up to 400 kHz. Three pins (A0, A1, and A2) are available for address selection, and enable the user to connect up to 8 devices on the same bus without address conflict. In addition, the serial interface gives the user easy access to all STLM75 registers to customize operation of the device.
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STLM75
Description
1.2
Temperature sensor output
The STLM75 temperature sensor has a dedicated open drain over-limit signal/interrupt (OS/INT) output which features a thermal alarm function. This function provides a userprogrammable trip and turn-off temperature. It can operate in either of two selectable modes:

Comparator mode, and Interrupt mode.
At power-up the STLM75 immediately begins measuring the temperature and converting the temperature to a digital value. The measured temperature value is compared with a temperature limit (which is stored in the 16-bit (TOS) READ/WRITE register), and the hysteresis temperature (which is stored in the 16-bit (THYS) READ/WRITE register). If the measured value exceeds these limits, the OS/INT pin is activated (see Figure 3 on page 8 and Table 2 on page 14). Note: See Pin descriptions on page 9 for details. Figure 1. Logic diagram
VDD SDA(1) SCL A0 A1 A2 STLM75 OS/INT(1)
GND
AI11899
1. SDA and OS/INT are open drain.
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Description Table 1.
Pin 1 2 3 4 5 6 7 8
STLM75 Signal names
Sym SDA(1) SCL OS/INT GND A2 A1 A0 VDD
(1)
Type/direction Input/ Output Input Output Supply ground Input Input Input Supply power
Description Serial data input/output Serial clock input Over-limit signal/interrupt alert output Ground Address2 Input Address1 Input Address0 Input Supply voltage (2.7 V to 5.5 V)
1. SDA and OS/INT are open drain.
Figure 2.
Connections (SO8 and TSSOP8)
SDA(1) SCL OS/INT(1) GND 1 2 3 4 8 7 6 5 VDD A0 A1 A2
AI11841
1. SDA and OS/INT are open drain.
Figure 3.
Functional block diagram
Temperature Sensor and Analog-to-Digital Converter (ADC) - VDD
Configuration Register Temperature Register THYS Set Point Register TOS Set Point Register
Pointer Register
Control and Logic Comparator
OS/INT
A0 2-wire I2C Interface
SDA
A1 A2
SCL
GND
AI11833a
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STLM75
Description
1.3
Pin descriptions
See Figure 1 on page 7 and Table 1 on page 8 for a brief overview of the signals connected to this device.
1.3.1
SDA (open drain)
This is the serial data input/output pin for the 2-wire serial communication port.
1.3.2
SCL
This is the serial clock input pin for the 2-wire serial communication port.
1.3.3
OS/INT (open drain)
This is the over-limit signal/interrupt alert output pin. It is open drain, so it needs a pull-up resistor. In Interrupt mode, it outputs a pulse whenever the measured temperature exceeds the programmed threshold (TOS). It behaves as a thermostat, toggling to indicate whether the measured temperature is above or below the threshold and hysteresis (THYS).
1.3.4
GND
Ground; it is the reference for the power supply. It must be connected to system ground.
1.3.5
A2, A1, A0
A2, A1, and A0 are selectable address pins for the 3 LSBs of the I2C interface address. They can be set to VDD or GND to provide 8 unique address selections.
1.3.6
VDD
This is the supply voltage pin, and ranges from +2.7 V to +5.5 V.
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Operation
STLM75
2
Operation
After each temperature measurement and analog-to-digital conversion, the STLM75 stores the temperature as a 16-bit two's complement number (see Table 5: Register pointers selection summary on page 17) in the 2-byte temperature register (see Table 7 on page 18). The most significant bit (S) indicates if the temperature is positive or negative:

for positive numbers S = 0, and for negative numbers S = 1.
The most recently converted digital measurement can be read from the temperature register at any time. Since temperature conversions are performed in the background, reading the temperature register does not affect the operation in progress. The temperature data is provided by the 9 MSBs (bits 15 through 7). Bits 6 through 0 are unused. Table 3 on page 15 gives examples of the digital output data and corresponding temperatures. The data is compared to the values in the TOS and THYS registers, and then the OS is updated based on the result of the comparison and the operating mode. The alarm fault tolerance is controlled by the FT1 and FT0 bits in the configuration register. They are used to set up a fault queue. This prevents false tripping of the OS/INT pin when the STLM75 is used in a noisy environment (see Table 3 on page 15). The active state of the OS output can be changed via the polarity bit (POL) in the configuration register. The power-up default is active-low. If the user does not wish to use the thermostat capabilities of the STLM75, the OS output should be left floating. Note: If the thermostat is not used, the TOS and THYS registers can be used for general storage of system data.
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STLM75
Operation
2.1
Applications information
STLM75 digital temperature sensors are optimal for thermal management and thermal protection applications. They require no external components for operations except for pullup resistors on SCL, SDA, and OS/INT outputs. A 0.1 F bypass capacitor on VDD is recommended. The sensing device of STLM75 is the chip itself. The typical interface connection for this type of digital sensor is shown in Figure 4 on page 11. Intended applications include:

System thermal management Computers/disk drivers Electronics/test equipment Power supply modules Consumer products Battery management Fax/printers management Automotive Typical 2-wire interface connections diagram
Pull-up VDD VDD 10k STLM75 O.S./INT(1) SCL 0.1F VDD Pull-up VDD
Figure 4.
10k
10k
Master Device
A0 A1 A2
SDA(1) I2C Address = 1001000 (1001A2A1A0) GND
AI12200
1. SDA and OS/INT are open drain.
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Operation
STLM75
2.2
Thermal alarm function
The STLM75 thermal alarm function provides user-programmable thermostat capability and allows the STLM75 to function as a standalone thermostat without using the serial interface. The OS output is the alarm output. This signal is an open drain output, and at power-up, this pin is configured with active-low polarity by default.
2.3
Comparator mode
In comparator mode, each time a temperature-to-digital (T-to-D) conversion occurs, the new digital temperature is compared to the value stored in the TOS and THYS registers. If a fault tolerance number of consecutive temperature measurements are greater than the value stored in the TOS register, the OS output will be asserted. For example, if the FT1 and FT0 bits are equal to "10" (fault tolerance = 4), four consecutive temperature measurements must exceed TOS to activate the OS output. Once the OS output is active, it will remain active until the first time the measured temperature drops below the temperature stored in the THYS register. When the thermostat is in comparator mode, the OS can be programmed to operate with any amount of hysteresis. The OS output becomes active when the measured temperature exceeds the TOS value a consecutive number of times as defined by the FT1 and FT0 fault tolerance (FT) bits in the configuration register. The OS then stays active when the temperature falls below the value stored in THYS register for a consecutive number of times as defined by the fault tolerance bits (FT1 and FT0). Putting the device into shutdown mode does not clear OS in comparator mode.
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STLM75
Operation
2.4
Interrupt mode
In interrupt mode, the OS output first becomes active when the measured temperature exceeds the TOS value a consecutive number of times as determined by the FT value in the configuration register. Once activated, the OS can only be cleared by either putting the STLM75 into shutdown mode or by reading from any register (temperature, configuration, TOS, or THYS) on the device. Once the OS has been deactivated, it will only be reactivated when the measured temperature falls below the THYS value a consecutive number of times equal to the FT value. Figure 5 illustrates typical OS output temperature response.
Note:
The OS can only be cleared by putting the device into shutdown mode or reading any register. Thus, this interrupt/clear process is cyclical between the TOS and THYS events (i.e., TOS, clear, THYS, clear, TOS, clear, THYS, clear, and so forth). These interrupt mode resets of the OS/INT pin occur only when the STLM75 is read or placed into shutdown mode. Otherwise, OS/INT would remain active independently for any event. Figure 5. OS output temperature response diagram
(1)
(1)
(1)
1. These interrupt mode resets of O.S. occur only when STLM75 is read or placed in shutdown. Otherwise, O.S. would remain active indefinitely for any event..
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Operation
STLM75
2.5
Fault tolerance
For both comparator and interrupt modes, the alarm "fault tolerance" setting plays a role in determining when the OS output will be activated. Fault tolerance refers to the number of consecutive times an error condition must be detected before the user is notified. Higher fault tolerance settings can help eliminate false alarms caused by noise in the system. The alarm fault tolerance is controlled by the bits (4 and 3) in the configuration register. These bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Table 2. At power-up, these bits both default to logic '0'. Table 2.
FT1 0 0 1 1 FT0 0 1 0 1
Fault tolerance setting
STLM75 (consecutive faults) 1 2 4 6 Power-up default Comments
2.6
Shutdown mode
For power-sensitive applications, the STLM75 offers a low-power shutdown mode. The SD bit in the configuration register controls shutdown mode. When SD is changed to logic '1,' the conversion in progress will be completed and the result stored in the temperature register, after which the STLM75 will go into a low-power standby state. The OS output will be cleared if the thermostat is operating in Interrupt mode and the OS will remain unchanged in comparator mode. The 2-wire interface remains operational in shutdown mode, and writing a '0' to the SD bit returns the STLM75 to normal operation.
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STLM75
Operation
2.7
Temperature data format
Table 3 shows the relationship between the output digital data and the external temperature. Temperature data for the temperature, TOS, and THYS registers is represented as a 9-bit, two's complement word. The left-most bit in the output data stream contains temperature polarity information for each conversion. If the sign bit is '0', the temperature is positive and if the sign bit is '1,' the temperature is negative. Table 3. Relationship between temperature and digital output
Digital output Temperature Binary +125C +25C +0.5C 0C -0.5C -25C -40C -55C 0 1111 1010 0 0011 0010 0 0000 0001 0 0000 0000 1 1111 1111 1 1100 1110 1 1011 0000 1 1001 0010 HEX 0FAh 032h 001h 000h 1FFh 1CEh 1B0h 192h
2.8
Bus timeout feature
The STLM75 supports an SMBus compatible timeout function which will reset the serial I2C/SMBus interface if SDA is held low for a period greater than the timeout duration between a START and STOP condition. If this occurs, the device will release the bus and wait for another START condition.
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Functional description
STLM75
3
Functional description
The STLM75 registers have unique pointer designations which are defined in Table 5 on page 17. Whenever any READ/WRITE operation to the STLM75 register is desired, the user must "point" to the device register to be accessed. All of these user-accessible registers can be accessed via the digital serial interface at anytime (see Serial interface on page 20), and they include:

Command register/address pointer register Configuration register Temperature register Over-limit signal temperature register (TOS) Hysteresis temperature register (THYS)
3.1
3.1.1
Registers and register set formats
Command/pointer register
The most significant bits (MSBs) of the command register must always be zero. Writing a '1' into any of these bits will cause the current operation to be terminated (Bit 2 through Bit 7 must be kept '0', see Table 4). Table 4.
MSB Bit7 0 Bit6 0 Bit5 0 Bit4 0 Bit3 0 Bit2 0 Bit1 P1
Command/pointer register format
LSB Bit0 P0
Pointer/register select bits
The command register retains pointer information between operations (see Table 5). Therefore, this register only needs to be updated once for consecutive READ operations from the same register. All bits in the command register default to '0' at power-up.
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STLM75 Table 5.
Pointer value (H) 00 01 02
Functional description Register pointers selection summary
P1 P0 Name Description Temperature register Configuration register Hysteresis register Overtemperature shutdown Width (bits) 16 8 16 Type (R/W) Readonly R/W R/W Poweron default N/A 00 4B00 Default = 75C Set point for overtemperature shutdown (TOS) limit default = 80C Comments To store measured temperature data
0 0 1
0 1 0
TEMP CONF THYS
03
1
1
TOS
16
R/W
5000
3.1.2
Configuration register
The configuration register is used to store the device settings such as device operation mode, OS operation mode, OS polarity, and OS fault queue. The configuration register allows the user to program various options such as thermostat fault tolerance, thermostat polarity, thermostat operating mode, and shutdown mode. The user has READ/WRITE access to all of the bits in the configuration register except the MSB (Bit7), which is reserved as a "Read only" bit (see Table 6). The entire register is volatile and thus powers-up in its default state only. Table 6.
Byte Bit7 STLM75 Reserved Default 0 Bit6 0 0 Bit5 0 0 Bit4 FT1 0 Bit3 FT0 0 Bit2 POL 0 Bit1 M 0 Bit0 SD 0
Configuration register format
MSB LSB
Keys: SD = shutdown control bit M = thermostat mode(1)
(2)
FT1 = fault tolerance1 bit Bit 5 = must be set to '0'. Bit 6 = must be set to '0'. Bit 7 = must be set to '0'. Reserved.
POL = output polarity
FT0 = fault tolerance0 bit
1. Indicates operation mode; 0 = comparator mode, and 1 = interrupt mode (see Comparator mode and Interrupt mode on page 13). 2. The OS is active-low ('0').
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Functional description
STLM75
3.1.3
Temperature register
The temperature register is a two-byte (16-bit) "Read only" register (see Table 7 on page 18). Digital temperatures from the T-to-D converter are stored in the temperature register in two's complement format, and the contents of this register are updated each time the T-to-D conversion is finished. The user can read data from the temperature register at any time. When a T-to-D conversion is completed, the new data is loaded into a comparator buffer to evaluate fault conditions and will update the temperature register if a read cycle is not ongoing. If a READ is ongoing, the previous temperature will be read. Accessing the STLM75 continuously without waiting at least one conversion time between communications will prevent the device from updating the temperature register with a new temperature conversion result. Consequently, the STLM75 should not be accessed continuously with a wait time of less than tCONV (max). All unused bits following the digital temperature will be zero. The MSB position of the temperature register always contains the sign bit for the digital temperature, and Bit14 contains the temperature MSB. All bits in the temperature register default to zero at powerup. Table 7.
Bytes MSB Bits 15 STLM75 14 13 12 11 10 9 8 7 6 0 5 0 4 0 3 0 2 0 1 0 0 0 TD8 TD7 TD TD TD TD TD TD TD0 (Sign) (TMSB) 6 5 4 3 2 1 (TLSB)
Temperature register format
HS byte TMSB LS byte TLSB LSB
Keys: SB = two's complement sign bit TMSB = temperature MSB TLSB = temperature LSB TDx = temperature data bits
Note:
These are comparable formats to the LM75.
3.1.4
Over-limit temperature register (TOS)
The TOS register is a two-byte (16-bit) READ/WRITE register that stores the userprogrammable upper trip-point temperature for the thermal alarm in two's complement format (see Table 8 on page 19). This register defaults to 80C at power-up (i.e., 0101 0000 0000 0000). The format of the TOS register is identical to that of the temperature register. The MSB position contains the sign bit for the digital temperature and Bit14 contains the temperature MSB. For 9-bit conversions, the trip-point temperature is defined by the 9 MSBs of the TOS register, and all remaining bits are "Don't cares".
18/37
STLM75
Functional description
3.1.5
Hysteresis temperature register (THYS)
THYS register is a two-byte (16-bit) READ/WRITE register that stores the userprogrammable lower trip-point temperature for the thermal alarm in two's complement format (see Table 8). This register defaults to 75C at power-up (i.e., 0100 1011 0000 0000). The format of this register is the same as that of the temperature register. The MSB position contains the sign bit for the digital temperature and Bit14 contains the temperature MSB. Table 8.
Bytes MSB Bits 15 STLM75 SB 14 TMSB 13 12 11 10 9 8 7 9-bit TLSB 6 0 5 0 4 0 3 0 2 0 1 0 0 0
TOS and THYS register format
HS byte TMSB LS byte TLSB LSB
TD TD TD TD TD TD
Keys: SB = two's complement sign bit TMSB = temperature MSB TLSB = temperature LSB TD = temperature data
Note:
These are comparable formats to the DS75 and LM75.
3.2
Power-up default conditions
The STLM75 always powers up in the following default states:

Thermostat mode = comparator mode Polarity = active-low Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the configuration register) TOS = 80C THYS = 75C Register pointer = 00 (temperature register)
Note:
After power-up these conditions can be reprogrammed via the serial interface.
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Functional description
STLM75
3.3
Serial interface
Writing to and reading from the STLM75 registers is accomplished via the two-wire serial interface protocol which requires that one device on the bus initiates and controls all READ and WRITE operations. This device is called the "master" device. The master device also generates the SCL signal which provides the clock signal for all other devices on the bus. These other devices on the bus are called "slave" devices. The STLM75 is a slave device (see Table 9). Both the master and slave devices can send and receive data on the bus. During operations, one data bit is transmitted per clock cycle. All operations follow a repeating, nine-clock-cycle pattern that consists of eight bits (one byte) of transmitted data followed by an acknowledge (ACK) or not acknowledge (NACK) from the receiving device.
Note:
There are no unused clock cycles during any operation, so there must not be any breaks in the data stream and ACKs/NACKs during data transfers. Consequently, having too few clock cycles can lead to incorrect operation if an inadvertent 8-bit READ from a 16-bit register occurs. So, the entire word must be transferred out regardless of the superflous trailing zeroes. Table 9.
MSB Bit7 1 Bit6 0 Bit5 0 Bit4 1 Bit3 A2 Bit2 A1 Bit1 A0
STLM75 serial bus slave addresses
LSB Bit0 R/W
3.4
2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bidirectional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be connected to a positive supply voltage via a pull-up resistor. The following protocol has been defined:

Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line, while the clock line is high, will be interpreted as control signals.
Accordingly, the following bus conditions have been defined (see Figure 6 on page 21):
3.4.1
Bus not busy
Both data and clock lines remain high.
3.4.2
Start data transfer
A change in the state of the data line, from high to low, while the clock is high, defines the START condition.
3.4.3
Stop data transfer
A change in the state of the data line, from low to high, while the clock is high, defines the STOP condition.
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STLM75
Functional description
3.4.4
Data valid
The state of the data line represents valid data when after a start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line may be changed during the low period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a start condition and terminated with a stop condition. The number of data bytes transferred between the start and stop conditions is not limited. The information is transmitted byte-wide and each receiver acknowledges with a ninth bit. By definition a device that gives out a message is called "transmitter", the receiving device that gets the message is called "receiver". The device that controls the message is called "master". The devices that are controlled by the master are called "slaves". Figure 6. Serial bus data transfer sequence
DATA LINE STABLE DATA VALID
CLOCK
DATA
START CONDITION
CHANGE OF DATA ALLOWED
STOP CONDITION
AI00587
21/37
Functional description
STLM75
3.4.5
Acknowledge
Each byte of eight bits is followed by one acknowledge bit. This acknowledge bit is a low level put on the bus by the receiver whereas the master generates an extra acknowledge related clock pulse (see Figure 7). A slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is a stable low during the high period of the acknowledge related clock pulse. Of course, setup and hold times must be taken into account. A master receiver must signal an end of data to the slave transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this case the transmitter must leave the data line high to enable the master to generate the STOP condition. Figure 7. Acknowledgement sequence
START SCL FROM MASTER 1 2 8 CLOCK PULSE FOR ACKNOWLEDGEMENT 9
DATA OUTPUT BY TRANSMITTER
MSB
LSB
DATA OUTPUT BY RECEIVER
AI00601
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STLM75
Functional description
3.5
READ mode
In this mode the master reads the STLM75 slave after setting the slave address (see Figure 8). Following the WRITE mode control bit (R/W=0) and the acknowledge bit, the word address 'An' is written to the on-chip address pointer. There are two READ modes:

Preset pointer locations (e.g. temperature, TOS and THYS registers), and Pointer setting (the pointer has to be set for the register that is to be read)
Note:
The temperature register pointer is usually the default pointer. These modes are shown in the READ mode typical timing diagrams (see Figure 9, Figure 10, and Figure 11). Figure 8. Slave address location
R/W
START
SLAVE ADDRESS
A
MSB
1
0
0
1
A2 A1 A0
AI12226
LSB
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Functional description Figure 9. Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS)
1 9 1 9 1 9
STLM75
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Start by Master
Address Byte ACK by STLM75
Most Significant Data Byte ACK by Master
Least Significant Data Byte
Stop Cond. by No ACK Master by Master
AI12227
Figure 10. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp)
1 9 1 9
1
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
0
D1 D0
Start by Master
Address Byte ACK by STLM75
1 9 1
Pointer Byte ACK by STLM75
9 1 9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Repeat Start by Master
Address Byte ACK by STLM75
Most Significant Data Byte ACK by Master
Least Significant Data Byte
Stop Cond. No ACK by by Master Master
AI12228
Figure 11. Typical 1-byte READ from the configuration register with preset pointer
1 9 1 9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Start by Master
Address Byte ACK by STLM75
Data Byte
Stop Cond. by No ACK Master by Master
AI12229
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STLM75
Functional description
3.6
WRITE mode
In this mode the master transmitter transmits to the STLM75 slave receiver. Bus protocol is shown in Figure 12. Following the START condition and slave address, a logic '0' (R/W = 0) is placed on the bus and indicates to the addressed device that word address will follow and is to be written to the on-chip address pointer. These modes are shown in the WRITE mode typical timing diagrams (see Figure 12, and Figure 13, and Figure 14). Figure 12. Typical pointer set followed by an immediate READ from the configuration register
1 9 1 9
1
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
0
D1 D0
Start by Master
Address Byte ACK by STLM75
Pointer Byte ACK by STLM75
1
9
1
9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Repeat Start by Master
Address Byte ACK by STLM75
Data Byte
Stop Cond. No ACK by by Master STLM75
AI12230
Figure 13. Configuration register WRITE
1 9 1 9 1 9
1
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
0
D1 D0
0
0
0
D4 D3 D2 D1 D0
Start by Master
Address Byte ACK by STLM75
Pointer Byte ACK by STLM75
Configuration Byte
Stop Cond. ACK by by Master STLM75
AI12231
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Functional description Figure 14. TOS and THYS WRITE
1 9 1 9
STLM75
1
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
0
D1 D0
Start by Master
Address Byte ACK by STLM75
Pointer Byte ACK by STLM75
1
9
1
9
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte ACK by STLM75
Least Significant Data Byte ACK by STLM75
Stop Cond. by Master
AI12232
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STLM75
Typical operating characteristics
4
Typical operating characteristics
Figure 15. Temperature variation vs. voltage
140 120 100
Temperature (C)
80 60 40 20 0 -20 -40 -60 2 3 4 5 6
-20 0.5 85 110 125
Voltage (V)
AI12258
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Maximum ratings
STLM75
5
Maximum ratings
Stressing the device above the ratings listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 10.
Symbol TSTG TSLD(1) VIO VDD VOUT IO PD
Absolute maximum ratings
Parameter Storage temperature (VCC Off, VBAT Off) Lead solder temperature for 10 seconds Input or output voltage Supply voltage Output voltage Output current Power dissipation Value -60 to 150 260 VCC +0.5 7.0 VDD + 0.5 10 320 Unit C C V V V mA mW
1. Reflow at peak temperature of 255C to 260C for < 30 seconds (total thermal budget not to exceed 180C for between 90 to 150 seconds).
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STLM75
DC and AC parameters
6
DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in Table 11, Operating and AC measurement conditions. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. Table 11. Operating and AC measurement conditions
Parameter VDD supply voltage Ambient operating temperature (TA) Input rise and fall times Input pulse voltages Input and output timing reference voltages Conditions 2.7 to 5.5 -55 to 125 5 0.2 to 0.8VCC 0.3 to 0.7VCC Unit V C ns V V
29/37
DC and AC parameters Table 12.
Sym VDD
STLM75 DC and AC characteristics
Description Test Condition(1) TA = -55 to +125C VDD = 3.3 V Min 2.7 125 Typ(2) Max 5.5 150 Unit V A
Supply voltage VDD supply current, active temperature conversions VDD supply current, communication only
IDD
TA = 25C
70
100
A
IDD1
Shutdown mode supply current, serial port inactive Accuracy for corresponding range 2.7 V VDD 5.5 V Resolution
TA = 25C -25C < TA < 100 -55C < TA < 125 9-bit temperature data
1.0
A C C C/LSB bits ms C C
2.0 3.0
0.5 9
tCONV TOS THYS VOL1 VIH VIL VOL2 CIN
Conversion time Over-temperature shutdown Hysteresis OS saturation voltage (VDD = 5V) Input logic high Input logic low Output logic low (SDA) Capacitance
9 Default value Default value 4 mA sink current Digital pins (SCL, SDA, A2-A0) Digital pins IOL2 = 3 mA 5 0.5xVDD -0.45 80 75
150
0.5 VDD + 0.5 0.3xVDD 0.4
V V V V pF
1. Valid for ambient operating temperature: TA = -55 to 125C; VDD = 2.7 V to 5.5 V (except where noted). 2. Typical number taken at VDD = 3 V, TA = 25C
30/37
STLM75 Figure 16. Bus timing requirements sequence
SDA tBUF tHD:STA tR SCL tHIGH P S tLOW tSU:DAT tHD:DAT tF
DC and AC parameters
tHD:STA
tSU:STA SR P
tSU:STO
AI00589
Table 13.
Sym fSCL tBUF tF
AC characteristics
Parameter(1) SCL clock frequency Time the bus must be free before a new transmission can start SDA and SCL fall time 0 600 600 1.3 300 100 600 600 interface(3) 75 325 Min 0 1.3 300 Max 400 Unit kHz s ns s ns ns s ns ns ns ns ms
tHD:DAT(2) Data hold time tHD:STA tHIGH tLOW tR tSU:DAT tSU:STA tSU:STO START condition hold time (after this period the first clock pulse is generated) Clock high period Clock low period SDA and SCL rise time Data setup time START condition setup time (only relevant for a repeated start condition) STOP condition setup time
tTIME-OUT SDA time low for reset of serial
1. Valid for ambient operating temperature: TA = -55 to 125C; VDD = 2.7 V to 5.5 V (except where noted). 2. Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling edge of SCL. 3. For SMBus compatibility, the STLM75 supports bus time-out. Holding the SDA line low for a time greater than time-out will cause the STLM75 to reset the SDA to the idle state of serial bus communication (SDA set to high).
31/37
Package mechanical data
STLM75
7
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
32/37
STLM75 Figure 17. SO8 - 8-lead plastic small package outline
Package mechanical data
h x 45 A2 b e 0.25 mm GAUGE PLANE k
8
A ccc c
D
E1
1
E A1 L L1
SO-A
Note:
Drawing is not to scale. Table 14.
Sym Typ A A1 A2 b c ccc D E E1 e h k L L1 1.04 4.90 6.00 3.90 1.27 0.25 0 0.40 0.50 8 0.127 0.041 4.80 5.80 3.80 0.10 1.25 0.28 0.17 0.48 0.23 0.10 5.00 6.20 4.00 0.193 0.236 0.154 0.050 0.010 0 0.016 0.020 8 0.050 0.189 0.228 0.150 Min Max 1.75 0.25 0.004 0.049 0.011 0.007 0.019 0.009 0.004 0.197 0.244 0.157 Typ Min Max 0.069 0.010
SO8 - 8-lead plastic small outline package mechanical data
mm inches
33/37
Package mechanical data Figure 18. MSOP8 (TSSOP8) - 8-lead, thin shrink small package (3x3) outline
D
STLM75
8
5 E1 E
c
1
4
k
A1 A ccc b e A2
L L1
L2
E3_ME
Note:
Drawing is not to scale. Table 15. MSOP8 (TSSOP8) - 8-lead, thin shrink small package (3x3) mechanical data
mm Sym Typ A A1 A2 b c D E E1 e L L1 L2 k ccc 3.00 4.90 3.00 0.65 0.60 0.95 0.25 0 8 0.10 0.40 0.80 0.85 0.00 0.75 0.22 0.08 2.80 4.65 2.80 Min Max 1.10 0.15 0.95 0.40 0.23 3.20 5.15 3.10 0.118 0.193 0.118 0.026 0.024 0.037 0.010 0 8 0.004 0.016 0.032 0.034 0.000 0.030 0.009 0.003 0.110 0.183 0.110 Typ Min Max 0.043 0.006 0.037 0.016 0.009 0.126 0.203 0.122 inches
34/37
STLM75
Part numbering
8
Part numbering
Table 16.
Example:
Ordering information scheme
STLM75 M 2 F
Device type STLM75
Package M = SO8 DS = MSSOP8 (TSSOP8)
Temperature range 2 = -55 to 125C
Shipping method F = ECOPACK(R) package, tape & reel E=ECOPACK(R) package, tube
For other options, or for more information on any aspect of this device, please contact the ST sales office nearest you.
35/37
Revision history
STLM75
9
Revision history
Table 17.
Date 23-Dec-2005 24-Feb-2006 06-Mar-2006 28-Jul-2006 22-Jan-2007
Document revision history
Revision 1 2 3 4 5 Initial release. Updated template, characteristics (Figure 1, 2, 3, 4, 5, ; Table 1, 6, 8, 11, 12, 13) Updated characteristics (Figure 5; Table 11, 12, 13) Updated figure 1 and 5 Updated features (cover page), DC and AC characteristics (Table 12), package mechanical data (Figure 17, Figure 14, Figure 18, Table 15) and part numbering (Table 16). Updated cover page (package information); Section 2.3: Comparator mode; Table 12; package mechanical data (Figure 18, and Table 15); and part numbering (Table 16). Updated cover page, document status upgraded to full datasheet, updated Table 13. Minor text changes; added Section 2.8: Bus timeout feature; updated Section 3.1.3: Temperature register. Updated cover page and Table 16. Changes
01-Mar-2007
6
06-Jun-2007 07-Jul-2008 18-Jul-2008
7 8 9
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STLM75
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